Abstract: |
Embodiments of the present disclosure propose two methods for integrating vacancy centers (VCs) on semiconductor substrates for forming VC-based spin qubit devices. The first method is based on using a self-assembly process for integrating VC islands on a semiconductor substrate. The second method is based on using a buffer layer of a III-N semiconductor material over a semiconductor substrate, and then integrating VC islands in an insulating carbon-based material such as diamond that is either grown as a layer on the III-N buffer layer or grown in the openings formed in the III-N buffer layer. Integration of VC islands on semiconductor substrates typically used in semiconductor manufacturing according to any of these methods may provide a substantial improvement with respect to conventional approaches to building VC-based spin qubit devices and may promote wafer-scale integration of VC-based spin qubits for use in quantum computing devices. |
Inventor: |
Thomas, Nicole K. (Portland, OR, US); Radosavljevic, Marko (Portland, OR, US); Dasgupta, Sansaptak (Hillsboro, OR, US); Pillarisetty, Ravi (Portland, OR, US); Singh, Kanwaljit (Rotterdam, NL); George, Hubert C. (Portland, OR, US); Roberts, Jeanette M. (North Plains, OR, US); Michalak, David J. (Portland, OR, US); Caudillo, Roman (Portland, OR, US); Yoscovits, Zachary R. (Beaverton, OR, US); Lampert, Lester (Portland, OR, US); Clarke, James S. (Portland, OR, US) |
Applicant: |
INTEL CORPORATION (Santa Clara, CA, US) |
Face Assignee: |
Intel Corporation (Santa Clara, CA, US) |
Filed: |
2018-03-22 |
Issued: |
2019-07-09 |
Claims: |
35 |
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US10347834
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1. A spin qubit device assembly comprising:
(9)
(3)
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11. A quantum integrated circuit (IC) package, comprising:
(5)
(4)
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23. A spin qubit device assembly comprising:
(5)
(4)
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31. A quantum computing device, comprising:
(3)
(3)
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