Application US20200116930

PHOTONICS PACKAGING METHOD AND DEVICE
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US20200116930

1. A photonic package comprising: (9) (3)

a photonic chip having a surface, a first recess formed on the surface, and a photonic microelectromechanical system (MEMS) device positioned at least partially in the first recess;

a substrate mounted on the surface of the photonic chip; and

a material layer disposed between the substrate and the photonic chip, the material layer having a second recess, the second recess being aligned with the first recess.

2. The photonic package of claim 1, wherein the first recess and the second recess collectively form a cavity, wherein the cavity is larger than each of the first and second recesses. (0)

3. The photonic package of claim 1, wherein the photonic MEMS device comprises a suspended optical waveguide. (0)

4. The photonic package of claim 1, wherein the photonic MEMS device comprises a photonic phase modulator. (1) (0)

5. The photonic package of claim 4, wherein the photonic phase modulator comprises: (1) (3)

an input optical waveguide;

an output optical waveguide; and

a suspended optical structure optically coupling the input optical waveguide to the output optical waveguide.

6. The photonic package of claim 5, wherein the suspended optical structure comprises: (0) (2)

7. The photonic package of claim 1, wherein the material layer comprises a non-conductive material. (0)

8. The photonic package of claim 1, further comprising a plurality of conductive pillars electrically coupling the substrate to the photonic chip. (1) (0)

10. The photonic package of claim 1, wherein the substrate comprises a silicon interposer. (1) (0)

12. The photonic package of claim 1, wherein the substrate comprises an ASIC. (0)

13. The photonic package of claim 1, wherein the surface is a first surface and the photonic chip comprises a second surface opposite the first surface, the second surface being mounted to a circuit board. (2) (0)

17. The photonic package of claim 1, wherein the photonic chip is edge-coupled to an optical fiber. (0)

18. A photonic package comprising: (5) (2)

a photonic chip having a plurality of photonic microelectromechanical system (MEMS) modulators; and

an application specific integrated circuit (ASIC) disposed on the photonic chip, the ASIC being in electrical communication with the plurality of photonic MEMS modulators.

19. The photonic package of claim 18, further comprising a silicon interposer disposed between the photonic chip and the ASIC. (0)

20. The photonic package of claim 18, further comprising a non-conductive film disposed between the photonic chip and the ASIC, the non-conductive film being patterned with a plurality of recesses, wherein the plurality of recesses are aligned with respective photonic MEMS modulators of the photonic chip. (1) (0)

22. The photonic package of claim 18, wherein at least one of the plurality of photonic MEMS modulators comprises a photonic phase modulator. (0)

23. The photonic package of claim 18, wherein at least one of the plurality of photonic MEMS modulators comprises a suspended optical waveguide. (0)

24. The photonic package of claim 18, wherein the photonic chip is positioned in a depression formed on a circuit board. (0)

25. A method for fabricating a photonic package, the method comprising: (7) (4)

obtaining a photonic chip having a plurality of photonic microelectromechanical system (MEMS) devices;

patterning a non-conductive film to form a plurality of recesses;

applying the patterned non-conductive film to a substrate; and

mounting the substrate to the photonic chip such that the plurality of recesses are aligned with respective ones of the plurality of photonic MEMS devices.

26. The method of claim 25, wherein the substrate comprises a silicon interposer, and wherein the method further comprises mounting an application specific integrated circuit (ASIC) to the silicon interposer. (0)

27. The method of claim 25, wherein the substrate comprises an ASIC. (0)

28. The method of claim 25, further comprising placing the photonic chip in a depression formed on a circuit board. (0)

29. The method of claim 25, further comprising edge-coupling an optical fiber to the photonic chip. (0)

30. The method of claim 25, further comprising transferring the substrate to a dicing tape prior to applying the patterned non-conductive film to the substrate. (0)

31. The method of claim 25, further comprising curing the patterned non-conductive film after the substrate has been mounted to the photonic chip. (0)

32. The method of claim 25, wherein mounting the substrate to the photonic chip comprises performing a thermo-compression bond. (0)

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Application US20200116930

PHOTONICS PACKAGING METHOD AND DEVICE

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